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INTEGRATED CIRCUITS
DATA SHEET
TDA9819 Multistandard vision and sound-IF PLL with DVB-IF processing
Product specification Supersedes data of 1996 Aug 02 File under Integrated Circuits, IC02 1998 Jul 14
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
FEATURES * 5 V supply voltage * Applicable for IF frequencies of 38.9 MHz and 45.75 MHz * Two switched VIF inputs, gain controlled wide band VIF-amplifier (AC-coupled) * True synchronous demodulation with active carrier regeneration (very linear demodulation, good intermodulation figures, reduced harmonics and excellent pulse response) * VCO frequency switchable between TV (M or BG/L) IF-picture carrier and Digital Video Broadcast (DVB) frequency * Separate video amplifier for sound trap buffering with high video bandwidth * VIF AGC detector for gain control, operating as peak sync detector for M and B/G and peak white detector for L; controlled reaction time for L * Tuner AGC with adjustable takeover point (TOP) * AFC detector without extra reference circuit * SIF input for single reference QSS mode (PLL controlled); SIF AGC detector for gain controlled SIF amplifier; single reference QSS mixer able to operate in high performance single reference QSS mode * AC-coupled limiter amplifier for sound intercarrier signal * Alignment-free FM-PLL demodulator with high linearity * AM demodulator without extra reference circuit * Stabilizer circuit for ripple rejection and to achieve constant output signals. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA9819 TDA9819T SDIP32 SO32 DESCRIPTION plastic shrink dual in-line package; 32 leads (400 mil) plastic small outline package; 32 leads; body width 7.5 mm DVB functions * Gain controlled IF-amplifier * Mixer for DVB-IF * VCO for QAM carrier recovery * External VCO control for DVB * Internal and external AGC for DVB
TDA9819
* DVB output level adjust via AGC adjust * High level DVB operational output amplifier. GENERAL DESCRIPTION The TDA9819 is an integrated circuit for multistandard vision and sound-IF signal processing with single reference PLL demodulator combined with the signal stages for DVB-IF processing.
VERSION SOT232-1 SOT287-1
1998 Jul 14
2
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
QUICK REFERENCE DATA SYMBOL VP IP Vi VIF(rms) Vo CVBS(p-p) PARAMETER supply voltage supply current vision IF input signal voltage sensitivity (RMS value) CVBS output signal voltage (peak-to-peak value) M, B/G and L standard; CL < 20 pF; RL > 1 k; AC load -1 dB video at output CONDITIONS MIN. 4.5 81 - 1.7 7 TYP. 5.0 100 60 2.0 8
TDA9819
MAX. 5.5 121 100 2.3 -
UNIT V mA V V MHz
B (M, BG/L) -3 dB video bandwidth on pin 10
S/N (W) 1.1 3.3 H Vi SIF(rms) Vo(rms)
weighted signal-to-noise ratio for video intermodulation attenuation at `blue' intermodulation attenuation at `blue' suppression of harmonics in video signal sound-IF input signal voltage sensitivity (RMS value) audio output signal voltage for FM (RMS value) audio output signal voltage for AM (RMS value) -3 dB at intercarrier output f = 1.1 MHz f = 3.3 MHz
56 58 58 35 -
60 64 64 40 70 0.5 0.5
- - - - 100 - -
dB dB dB dB V V V
M and B/G standard; - 25 kHz frequency deviation L standard; 54% modulation -
THD
total harmonic distortion FM AM 25 kHz frequency deviation - 54% modulation - 0.15 0.5 60 53 0.5 1.0 - - % % dB dB
S/N (W)
weighted signal-to-noise ratio FM AM 25 kHz frequency deviation - 54% modulation 47
1998 Jul 14
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SIF IF-filter INTERNAL VOLTAGE STABILIZER SIF-AGC FM DETECTOR (PLL) 26 1/2 VP 8 CSAGC 4.5/5.5 VP (+5 V) standard (1) switch QSS intercarrier output AF mute 9 20 17 14 CAF
MBH352
BLOCK DIAGRAM
Philips Semiconductors
Multistandard vision and sound-IF PLL with DVB-IF processing
TOP handbook, full pagewidth tuner AGC 6
DVB CVAGC CBL AGC adjust
DVB AGC external AFC
loop filter
DVB external VCO control 7 16
2fPC VCO adjust
19 28 VIF-AGC
3
15 DVB AGC
13
23 AFC DETECTOR
25 VCO TWD
24
11
TUNER AGC
(1)
TDA9819
30 1
21 FPLL VIF DEMODULATOR/ DVB MIXER
video 1 V (p-p)
input/DVB switch
18
VIF
A
2 4 VIF SWITCH
DVB 2 V (p-p)
DVB
B
5 LOGIC 31 32 AM DEMODULATOR SIF MIXER 10 22 CVBS 2 V (p-p) video buffer AF
12
29
27
Product specification
TDA9819
(1) See switch logic Table 2.
Fig.1 Block diagram.
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
PINNING SYMBOL Vi VIF1 Vi VIF2 CBL Vi VIF3 Vi VIF4 TADJ TPLL CSAGC STD Vo CVBS VCOADJ Vo AF VAGC(ext) CAF AGCADJ VVCO(ext) Vi FM DVB TAGC Vo QSS Vo(vid) Vi(vid) AFC VCO1 VCO2 Cref GND CVAGC VP INSWI Vi SIF1 Vi SIF2 PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 DESCRIPTION VIF differential input signal voltage 1 VIF differential input signal voltage 2 black level detector VIF differential input signal voltage 3 VIF differential input signal voltage 4 tuner AGC takeover adjust (TOP) PLL loop filter SIF AGC capacitor standard switch input 2 V CVBS output signal voltage VCO adjust BG/L/M audio voltage frequency output external AGC voltage (DVB) AF decoupling capacitor AGC adjust (DVB) external VCO control voltage (DVB) sound intercarrier input DVB output tuner AGC output single reference QSS output voltage composite video output voltage video buffer input voltage AFC output VCO1 reference circuit for 2fPC VCO2 reference circuit for 2fPC
1 2VP
handbook, halfpage
TDA9819
Vi VIF1 Vi VIF2 CBL Vi VIF3 Vi VIF4 TADJ TPLL CSAGC STD
1 2 3 4 5 6 7 8
32 Vi SIF2 31 Vi SIF1 30 INSWI 29 VP 28 CVAGC 27 GND 26 Cref 25 VCO2
TDA9819
9 24 VCO1 23 AFC 22 Vi(vid) 21 Vo(vid) 20 Vo QSS 19 TAGC 18 DVB 17 Vi FM
MBH354
Vo CVBS 10 VCOADJ 11 Vo AF 12 VAGC(ext) 13 CAF 14 AGCADJ 15 VVCO(ext) 16
reference capacitor
ground VIF AGC capacitor supply voltage (+5 V) VIF input switch SIF differential input signal voltage 1 SIF differential input signal voltage 2 Fig.2 Pin configuration (SDIP32).
1998 Jul 14
5
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
FUNCTIONAL DESCRIPTION Vision IF amplifier and input switch The vision IF amplifier consists of three AC-coupled differential amplifier stages. Each differential stage comprises a feedback network controlled by emitter degeneration to control the IF gain. The first differential stage is extended by two pairs of emitter followers to provide two IF input channels. The VIF input can be selected by pin 30. Tuner and VIF AGC The AGC capacitor voltage is transferred to an internal IF control signal, and is fed to the tuner AGC to generate the tuner AGC output current (open-collector output). The tuner AGC takeover point can be adjusted. This allows the tuner and the SWIF filter to be matched to achieve the optimum IF input level. The AGC detector charges/discharges the AGC capacitor to the required voltage for setting of VIF and tuner gain in order to keep the video signal at a constant level. Therefore for negative video modulation the sync level and for positive video modulation the peak white level of the video signal is detected. In order to reduce the reaction time for positive modulation, where a very large time constant is needed, an additional level detector increases the discharging current of the AGC capacitor (fast mode) in the event of a decreasing VIF amplitude step. The additional level information is given by the black-level detector voltage. Frequency Phase Locked Loop detector (FPLL) The VIF-amplifier output signal is fed into a frequency detector and into a phase detector via a limiting amplifier. During acquisition the frequency detector produces a DC current proportional to the frequency difference between the input and the VCO signal. After frequency lock-in the phase detector produces a DC current proportional to the phase difference between the VCO and the input signal. The DC current of either frequency detector or phase detector is converted into a DC voltage via the loop filter, which controls the VCO frequency. In the event of positive modulated signals the phase detector is gated by composite sync in order to avoid signal distortion for overmodulated VIF signals.
TDA9819
VCO, Travelling Wave Divider (TWD) and AFC The VCO operates with a resonance circuit (with L and C in parallel) at double the PC frequency. The VCO is controlled by two integrated variable capacitors. The control voltage required to tune the VCO from its free-running frequency to actually double the PC frequency is generated by the frequency phase detector (FPLL) and fed via the loop filter to the first variable capacitor. This control voltage is amplified and converted into a current which represents the AFC output signal. The VCO centre frequency can be decreased by activating an additional internal capacitor. With a variable resistor at VCOADJ (pin 11) the frequency for the M, B/G and L mode can be tuned to the picture carrier frequency. At centre frequency the AFC output current is equal to zero. The oscillator signal is divided-by-two with a TWD which generates two differential output signals with a 90 degree phase difference independent of the frequency. Video demodulator and amplifier The video demodulator is realized by a multiplier which is designed for low distortion and large bandwidth. The vision IF input signal is multiplied with the `in phase' signal of the travelling wave divider output. In the demodulator stage the video signal polarity can be switched in accordance with the TV standard. The demodulator output signal is fed via an integrated low-pass filter for attenuation of the carrier harmonics to the video amplifier. The video amplifier is realized by an operational amplifier with internal feedback and high bandwidth. A low-pass filter is integrated to achieve an attenuation of the carrier harmonics for M, B/G and L standard. The standard dependent level shift in this stage delivers the same sync level for positive and negative modulation. The video output signal is 1 V (p-p) for nominal vision IF modulation. Video buffer For an easy adaption of the sound traps an operational amplifier with internal feedback is used in the event of M, B/G and L standard. This amplifier is featured with a high bandwidth and 7 dB gain. The input impedance is adapted for operating in combination with ceramic sound traps. The output stage delivers a nominal 2 V (p-p) positive video signal. Noise clipping is provided.
1998 Jul 14
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Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
SIF amplifier and AGC The sound IF amplifier consists of two AC-coupled differential amplifier stages. Each differential stage comprises a controlled feedback network provided by emitter degeneration. The SIF AGC detector is related to the SIF input signals (average level of AM or FM carriers) and controls the SIF amplifier to provide a constant SIF signal to the AM demodulator and single reference QSS mixer. The SIF AGC reaction time is set to `slow' for nominal video conditions. But with a decreasing VIF amplitude step the SIF AGC is set to `fast' mode controlled by the VIF AGC detector. In FM mode this reaction time is also set to `fast' controlled by the standard switch. Single reference QSS mixer The single reference QSS mixer is realized by a multiplier. The SIF amplifier output signal is fed to the single reference QSS mixer and converted to intercarrier frequency by the regenerated picture carrier (VCO). The mixer output signal is fed via a high-pass for attenuation of the video signal components to the output pin 20. With this system a high performance hi-fi stereo sound processing can be achieved. For a simplified application without a sound-IF SAW filter the single reference QSS mixer can be switched to the intercarrier mode by connecting pins 31 and 32 to ground (see note 18 of Chapter "Characteristics"). In this mode the sound-IF passes the VIF SAW filter and the composite IF signal is fed to the single reference QSS mixer. This IF signal is multiplied by the 90 TWD output signal for converting the sound-IF to intercarrier frequency. By using this quadrature detection, the low frequency video signals are removed. Due to the sound-IF attenuation in the VIF filter (sound shelf), the audio signal-to-noise (S/N) figure decreases. AM demodulator The AM demodulator (French L standard) is realized by a multiplier. The modulated SIF amplifier output signal is multiplied in phase with the limited (AM is removed) SIF amplifier output signal. The demodulator output signal is fed via an integrated low-pass filter for attenuation of the carrier harmonics to the AF amplifier. FM detector
TDA9819
The FM detector consists of a limiter, an FM-PLL and an AF amplifier. The limiter provides the amplification and limitation of the FM sound intercarrier signal before demodulation. The result is high sensitivity and AM suppression. The amplifier consists of 7 stages which are internally AC-coupled in order to minimize the DC offset and to save pins for DC decoupling. The FM-PLL consists of an integrated relaxation oscillator, an integrated loop filter and a phase detector. The oscillator is locked to the FM intercarrier signal, output from the limiter. As a result of locking, the oscillator frequency tracks with the modulation of the input signal and the oscillator control voltage is superimposed by the AF voltage. The FM-PLL operates as an FM-demodulator. The AF amplifier consists of two parts: 1. The AF preamplifier for FM sound is an operational amplifier with internal feedback, high gain and high common mode rejection. The AF voltage from the PLL demodulator, by principle a small output signal, is amplified by approximately 30 dB. The low-pass characteristic of the amplifier reduces the harmonics of the intercarrier signal at the sound output terminal. An additional DC control circuit is implemented to keep the DC level constant, independent of process spread. 2. The AF output amplifier (10 dB) provides the required output level by a rail-to-rail output stage. This amplifier makes use of an input selector for switching to AM/FM or mute state, controlled by the standard switching voltage and the mute switching voltage. Internal voltage stabilizer and 12VP reference The band gap circuit internally generates a voltage of approximately 1.25 V, independent of supply voltage and temperature. A voltage regulator circuit, connected to this voltage, produces a constant voltage of 3.6 V which is used as an internal reference voltage. For all audio output signals the constant reference voltage cannot be used because large output signals are required. Therefore these signals refer to half the supply voltage to achieve a symmetrical headroom, especially for the rail-to-rail output stage. For ripple and noise attenuation the 12VP voltage has to be filtered via a low-pass filter by using an external capacitor together with an integrated resistor (fg = 5 Hz). For a fast setting to 12VP an internal start-up circuit is added.
1998 Jul 14
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Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
DVB mixer The VCO can be controlled by an external DC signal to provide a carrier for the down-conversion of the DVB-IF signal. The VCO frequency as a function of the voltage at pin 16 is given in Figs 10 and 11. DVB AGC For the DVB operation a peak AGC detector is activated. The peak value of (digital) QAM signal is detected and controlled to a constant value by the variable VIF amplifier. The detector bandwidth is adapted to the signal frequency (3 to 11 MHz). The external AGC time constant is given by the VIF AGC capacitor at pin 28.
TDA9819
The DVB output signal VO DVB can be adjusted in a range of 3 dB by a control voltage Vadj at pin 15. The internal AGC can be switched off (see Table 2) and the IF gain can be controlled by an external voltage at pin 13. The tuner AGC is active in both instances. DVB output buffer The output buffer for the DVB signal has a high bandwidth and 0 dB gain. An inverting configuration was chosen to obtain minimum distortion. For non-DVB standards the buffer is switched to a mute to reduce the output signal level.
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VP Vn tsc(max) V19 Tstg Tamb Ves Notes 1. IP = 125 mA; Tamb = 70 C; Rth(j-a) = 60 K/W. 2. Machine model class B. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient CONDITIONS in free air VALUE 60 UNIT K/W PARAMETER supply voltage (pin 29) voltage at pins 1 to 9, 11 to 13, 15, 16, 19, 22, 23 and 28 to 32 maximum short-circuit time tuner AGC output voltage storage temperature operating ambient temperature electrostatic handling voltage note 2 CONDITIONS maximum chip temperature of 125 C; 0 note 1 0 - 0 -25 -20 -300 MIN. MAX. 7.0 VP 10 13.2 +150 +70 +300 UNIT V V s V C C V
1998 Jul 14
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Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
TDA9819
CHARACTERISTICS VP = 5 V; Tamb = 25 C; see Table 1 for input frequencies and level; input level Vi IF1-2, 4-5 = 10 mV RMS value (sync-level for M and B/G, peak white level for L); video modulation DSB; residual carrier M and B/G: 10%; L = 3%; video signal in accordance with "CCIR, line 17"; measurements taken in Fig.12; unless otherwise specified. SYMBOL Supply (pin 29) VP IP supply voltage supply current note 1 M, B/G and L standard DVB Vision IF amplifier (pins 1, 2, 4 and 5) Vi VIF(rms) Vi max(rms) Vo(int) input signal voltage sensitivity (RMS value) maximum input signal voltage (RMS value) internal IF amplitude difference between picture and sound carrier IF gain control range differential input resistance differential input capacitance DC input voltage input resistance to ground DC input voltage crosstalk attenuation of IF input switch at pins 1, 2, 4 and 5 M, B/G and L standard; -1 dB video at output M, B/G and L standard; +1 dB video at output within AGC range; f = 5 MHz see Fig.3 note 2; input activated note 2; input activated note 2; input activated note 2; input not activated note 2; input not activated notes 2 and 3 - 140 - 60 200 0.7 90 - 1 V mV dB 4.5 89 81 5.0 105 96 5.5 121 111 V mA mA PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
GIF Ri(diff) Ci(diff) V1, 2, 4, 5 Ri V1, 2, 4, 5 i IF
65 1.7 1.2 - - - 55
70 2.2 1.7 3.3 1.1 0.2 60
- 2.7 2.5 - - - -
dB k pF V k V dB
True synchronous video demodulator; note 4 fVCO(max) f osc -----------T V0 ref(rms) fPC CR fPC(fr) fPC(alg) maximum oscillator frequency for f = 2fPC carrier regeneration oscillator drift as a function of temperature oscillator voltage swing between pins 24 and 25 (RMS value) vision carrier capture range M standard B/G and L standard vision carrier frequency accuracy M standard (free-running) B/G and L standard frequency alignment range IAFC = 0; M standard IAFC = 0; B/G and L standard tacq Vi VIF(rms) acquisition time VIF input signal voltage sensitivity for PLL to be locked (RMS value; pins 1, 2, 4 and 5) BL = 70 kHz; note 6 maximum IF gain; note 7 free-running oscillator; IAFC = 0; note 5 125 - - 1.0 1.35 - - 300 400 - - 130 - 60 1.25 1.6 150 200 400 600 - 60 - 20 - - - 300 400 - - 30 90 MHz ppm/K
mV MHz MHz kHz kHz kHz kHz ms V
1998 Jul 14
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Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
SYMBOL IFPLL(offset) Vo video(p-p) V21(sync) V21(clu) V21(cll) Ro,21 Iint 21 I21 max(sink) I21 max(source) B-1 B-3 H PSRR PARAMETER FPLL offset current at pin 7 note 8 CONDITIONS - MIN. - TYP.
TDA9819
MAX. 4.5
UNIT A
Composite video amplifier (pin 21; sound carrier off) output signal voltage (peak-to-peak value) sync voltage level upper video clipping voltage level lower video clipping voltage level output resistance internal DC bias current for emitter-follower maximum AC and DC output sink current maximum AC and DC output source current -1 dB video bandwidth -3 dB video bandwidth suppression of video signal harmonics power supply ripple rejection at pin 21 CL < 50 pF; RL > 1 k; AC load CL < 50 pF; RL > 1 k; AC load CL < 50 pF; RL > 1 k; AC load; note 9 video signal; grey level; see Fig.9 M and B/G standard L standard CVBS buffer amplifier (only) and noise clipper (pins 10 and 22) Ri,22 Ci,22 VI,22 Gv V10(clu) V10(cll) Ro,10 Iint 10 Io,10 max(sink) input resistance input capacitance DC input voltage voltage gain upper video clipping voltage level lower video clipping voltage level output resistance DC internal bias current for emitter-follower maximum AC and DC output sink current note 2 M, B/G and L standard; note 10 note 2 note 2 2.6 1.4 1.5 6.5 3.9 - - 2.0 1.4 2.4 CL < 20 pF; RL > 1 k; AC load CL < 20 pF; RL > 1 k; AC load 10 8.4 11 3.3 2 1.8 7 4.0 1.0 - 2.5 - - 11 14 4.0 3.0 2.1 7.5 - 1.1 10 - - - - - k pF V dB V V mA mA mA MHz MHz 32 26 35 30 - - dB dB note 2 see Fig.8 0.88 - - - 1.6 1.0 2.0 5 7 35 1.0 1.5 0.7 - 2.0 - - 6 8 40 1.12 - - 0.9 10 - - - - - - V V V V mA mA mA MHz MHz dB
VP - 1.1 VP - 1
Io,10 max(source) maximum AC and DC output source current B-1 B-3 -1 dB video bandwidth -3 dB video bandwidth
1998 Jul 14
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
SYMBOL PARAMETER CONDITIONS MIN. TYP.
TDA9819
MAX.
UNIT
Measurements from IF input to CVBS output (pin 10; 330 between pins 21 and 22, sound carrier off) Vo CVBS(p-p) Vo CVBS(sync) Vo Vo(blBG) Vo(blL) CVBS output signal voltage on pin 10 (peak-to-peak value) sync voltage level deviation of CVBS output signal voltage at M and B/G standard black level tilt in M and B/G standard black level tilt for worst case in L standard differential gain differential phase -1 dB video bandwidth note 10 M and B/G standard L standard 50 dB gain control 30 dB gain control gain variation; note 11 vision carrier modulated by test line (VITS) only; gain variation; note 11 1.7 - - - - - - 2.0 1.35 1.35 - - - - 2.3 - - 0.5 0.1 1 1.9 V V V dB dB % %
Gdiff diff B-1
"CCIR, line 330" "CCIR, line 330"
CL < 20 pF; RL > 1 k; AC load; M, B/G and L standard CL < 20 pF; RL > 1 k; AC load; M, B/G and L standard see Fig.5 and note 12 see Fig.5 and note 12 f = 1.1 MHz; see Fig.6 and note 13 f = 1.1 MHz; see Fig.6 and note 13 f = 3.3 MHz; see Fig.6 and note 13 f = 3.3 MHz; see Fig.6 and note 13 fundamental wave and harmonics; M, B/G and L standard note 9 note 14 video signal; grey level; see Fig.9 M and B/G standard L standard
- - 5
2 1 6
5 2 -
% deg MHz
B-3
-3 dB video bandwidth
7
8
-
MHz
S/N (W) S/N IM1.1
weighted signal-to-noise ratio unweighted signal-to-noise ratio intermodulation attenuation at `blue' intermodulation attenuation at `yellow'
56 49 58 60 58 59 -
60 53 64 66 64 65 2
- - - - - - 10
dB dB dB dB dB dB mV
IM3.3
intermodulation attenuation at `blue' intermodulation attenuation at `yellow'
c(rms)
residual vision carrier (RMS value) suppression of video signal harmonics spurious elements power supply ripple rejection at pin 10
H(sup) H(spur) PSRR
35 40
40 -
- -
dB dB
25 20
28 23
- -
dB dB
1998 Jul 14
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Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
SYMBOL PARAMETER CONDITIONS MIN. TYP.
TDA9819
MAX.
UNIT
VIF-AGC detector (pin 28) I28 charging current additional charging current M, B/G and L standard; note 11 L standard in event of missing VITS pulses and no white video content M and B/G standard normal mode L fast mode L tresp AGC response to an increasing VIF step AGC response to a decreasing VIF step IF V3(th) M, B/G and L standard; note 15 M and B/G standard fast mode L normal mode L; note 15 VIF amplitude step for activating fast AGC mode threshold voltage level additional charging current L standard see Fig.8 L standard L standard; fast mode L Tuner AGC (pin 19) Vi(rms) IF input signal voltage for minimum starting point of tuner takeover (RMS value) IF input signal voltage for maximum starting point of tuner takeover (RMS value) Vo,19 Vsat,19 V TOP ,19 ----------------------T I19(sink) permissible output voltage saturation voltage variation of takeover point by temperature sink current input at pins 1, 2, 4 and 5; RTOP = 22 k; I19 = 0.4 mA input at pins 1, 2, 4 and 5; RTOP = 0 ; I19 = 0.4 mA - 2 5 mV - - 1.95 1.65 - - V V 0.75 1.9 1 2.5 1.25 3.1 mA A
discharging current
15 225 30 - - - - -2
20 300 40 - 2.2 1.1 150 -6
25 375 50 0.1 3.5 1.8 240 -10
A nA A ms/dB ms/dB ms/dB ms/dB dB
50
100
-
mV
from external source; note 2 - I19 = 1.5 mA I19 = 0.4 mA see Fig.3 no tuner gain reduction; V19 = 13.2 V maximum tuner gain reduction - 1.5 - - -
- - 0.03
13.2 0.2 0.07
V V dB/K
- 2 6
5 2.6 8
A mA dB
GIF
IF slip by automatic gain control
tuner gain current from 20 to 80%
1998 Jul 14
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Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
SYMBOL PARAMETER control steepness I23/f CONDITIONS MIN. TYP.
TDA9819
MAX.
UNIT A/kHz A/kHz ppm/K
AFC circuit (pin 23); see Fig.7 and note 16 SUSA SEUR f IF --------T Vo,23 Io,23(source) Io,23(sink) I23(p-p) frequency variation by temperature output voltage upper limit output voltage lower limit output source current output sink current residual video modulation current (peak-to-peak value) M, B/G and L standard f0 = 45.75 MHz; see Fig.12 and note 17 f0 = 38.9 MHz; see Fig.12 and note 17 IAFC = 0; note 5 see Fig.7 see Fig.7 0.6 0.5 - 0.91 0.72 - 1.2 1.0 20
VP - 0.6 VP - 0.3 - - 150 150 - 0.3 200 200 20 0.6 250 250 30
V V A A A
Sound IF amplifier (pins 31 and 32); note 18 Vi SIF(rms) input signal voltage sensitivity (RMS value) FM mode; -3 dB at intercarrier output pin 20 AM mode; -3 dB at AF output pin 12 Vi max(rms) maximum input signal voltage (RMS value) FM mode; +1 dB at intercarrier output pin 20 AM mode; +1 dB at AF output pin 12 GSIFcr Ri(diff) Ci(diff) VI(31,32) SIF,VIF SIF gain control range differential input resistance differential input capacitance DC input voltage crosstalk attenuation between SIF and VIF input between pins 1, 2, 4 and 5 and pins 31 and 32; notes 2 and 3 note 2 note 2 - - 40 100 40 80 80 160 64 2.2 1.7 3.4 - 70 110 - - - 2.7 2.5 - - V V mV mV dB k pF V dB
FM and AM mode; see Fig.4 59 1.7 1.2 - 50
SIF-AGC detector (pin 8) I8 charging current discharging current FM mode AM mode FM mode normal mode AM fast mode AM 8 0.8 8 1 60 12 1.2 12 1.4 85 16 1.6 16 1.8 110 A A A A A
1998 Jul 14
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Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
SYMBOL PARAMETER CONDITIONS MIN. TYP.
TDA9819
MAX.
UNIT
Single reference QSS intercarrier mixer (M and B/G standard; pin 20); note 18 Vo(rms) B-3 SC(rms) Ro,20 VO,20 Iint 20 I20 max(sink) I20 max(source) IF intercarrier level (RMS value) -3 dB intercarrier bandwidth residual sound carrier (RMS value) output resistance DC output voltage DC internal bias current for emitter-follower maximum AC and DC output sink current maximum AC and DC output source current SC1; sound carrier 2 off upper limit fundamental wave and harmonics note 2 75 7.5 - - - 1.5 1.1 3.0 100 9 2 10 2.0 1.9 1.5 3.5 125 - - 20 - - - - mV MHz mV V mA mA mA
Limiter amplifier (pin 17); note 19 Vi FM(rms) Vi FM(rms) input signal voltage for lock-in (RMS value) input signal voltage (RMS value) allowed input signal voltage (RMS value) R17 V17 fi FM(catch) fi FM(hold) tacqu input resistance DC input voltage note 2 S+N ------------- = 40 dB N - - 200 480 - - 300 - 600 2.7 - - - - - 100 400 - 720 - - 4.0 - 3.0 4 V V mV V
FM-PLL detector catching range of PLL holding range of PLL acquisition time upper limit lower limit upper limit lower limit 7.0 - 9.0 - - MHz MHz MHz MHz s
1998 Jul 14
14
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
SYMBOL PARAMETER CONDITIONS MIN. TYP.
TDA9819
MAX.
UNIT
FM operation (M and B/G standard) (pin 12); note 19 Vo AF12(rms) AF output signal voltage (RMS value) without de-emphasis; 25 kHz; see Fig.12 and note 20 Rx = 470 Rx = 0 Vo AF12(cl)(rms) fAF Vo V14 R12 V12 I12(max)(sink) I12(max)(source) B-3 THD S/N (W) AF output clipping signal voltage level (RMS value) frequency deviation temperature drift of AF output signal voltage DC voltage at decoupling capacitor output resistance DC output voltage maximum AC and DC output sink current maximum AC and DC output source current -3 dB AF bandwidth total harmonic distortion weighted signal-to-noise ratio FM-PLL only; with 75 s de-emphasis; 25 kHz; "CCIR 468-4" fundamental wave and harmonics 75 s de-emphasis; AM: f = 1 kHz; m = 0.3 referenced to 25 kHz AF signal muted FM-PLL in lock mode without de-emphasis voltage dependent on VCO frequency; note 21 note 2 tracked with supply voltage THD < 1.5% THD < 1.5%; note 20 200 400 1.3 - - 1.2 - - - - 100 - 55 250 500 1.4 - 3 - -
1 V 2P
300 600 - 53 7 3.0 100 - 1.1 1.1 - 0.5 -
mV mV V kHz 10-3 dB/K V V mA mA kHz % dB
- - 125 0.15 60
c(rms) AM
residual sound carrier (RMS value) AM suppression
- 45
- 50
75 -
mV dB
12 I17(mute) V12
mute attenuation of AF signal current output from pin 17 DC jump voltage of AF output terminal for switching AF output to mute state and vice versa power supply ripple rejection at pin 12
68 200 -
73 300 50
- 600 150
dB A mV
PSRR
M standard; see Fig.9 B/G standard; see Fig.9
26 20
30 24
- -
dB dB
1998 Jul 14
15
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
SYMBOL PARAMETER CONDITIONS MIN. TYP.
TDA9819
MAX.
UNIT
Single reference QSS AF performance for FM operation (M standard); see Table 1 and notes 20 and 22 to 24; sound attenuation of VIF SAW filter: minimum 33 dB S/N (W) weighted signal-to-noise ratio PC/SC ratio at pins 1 and 2; 25 kHz FM deviation; 75 s de-emphasis; "CCIR 468-4" black picture white picture colour bar 40 - - dB
51 50 48
56 53 51
- - -
dB dB dB
Single reference QSS AF performance for FM operation (B/G standard); see Table 1 and notes 20 and 22 to 24; sound attenuation of VIF filter: minimum 27 dB S/N (W) weighted signal-to-noise ratio (SC1/SC2) PC/SC ratio at pins 1 and 2; 27 kHz; "CCIR 468-4"; 50 s de-emphasis black picture white picture 6 kHz sine wave (black to white modulation) AM operation (L standard; pin 12); note 25 Vo AF 12(rms) THD B-3 S/N (W) V12 PSRR AF output signal voltage (RMS value) total harmonic distortion -3 dB AF bandwidth weighted signal-to-noise ratio DC potential voltage power supply ripple rejection 54% modulation 54% modulation 400 - 100 47 - 22 500 0.5 125 53
1 V 2P
40
-
-
dB
53/48 52/46 44/42
58/55 55/53 48/46
- - -
dB dB dB
600 1.0 - - - -
mV % kHz dB V dB
"CCIR 468-4"
tracked with supply voltage see Fig.9
25
Standard switch (pin 9); see also Table 2 V9 VIH VIL IIL V30 VIH VIL IIL V11 DC potential for settings HIGH-level input voltage LOW-level input voltage LOW-level input current V9 = 0 V 1.3 0 85 - - 110 VP 0.8 135 V V A
VIF input/DVB switch (pin 30); see also Table 2 DC potential for settings HIGH-level input voltage LOW-level input voltage LOW-level input current V30 = 0 V 1.3 0 180 - - 230 VP 0.8 280 V V A
VCO adjust (pin 11) DC potential for VCO frequency adjust 0 1 2 V
1998 Jul 14
16
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
SYMBOL PARAMETER CONDITIONS MIN. TYP.
TDA9819
MAX.
UNIT
VIF amplifier (measured at fIF = 43.75 MHz; DVB mode) V4-5(rms) V4-5(rms) G R4-5(diff) C4-5(diff) fVCO V0 ref(rms) SSB V16 Ri,16 SVCO input sensitivity (RMS value) maximum input signal (RMS value) total gain control IF amplifier tilt for f 3 MHz input resistance (differential) input capacitance (differential) fs = 6.9 MHz; 40 dB gain note 2 note 2 -1 dB AM signal at output +1 dB AM signal at output - - 52 - - - 200 200 58 0.5 2.2 1.7 - - - 1 - - - - - VP 76 - - V mV dB dB k pF
DVB mixer and VCO maximum oscillator frequency oscillator voltage swing between pins 24 and 25 (RMS value) VCO phase noise at f = 100 kHz VCO control range VCO control input resistance control steepness fs/V16 see Figs 10 and 11 DVB (USA) DVB (EUROPE) DVB output buffer VO DVB(p-p) Iint 18 I18 max(sink) I18 max(source) DVB output signal (QAM) (peak-to-peak value) DC internal bias current for emitter-follower maximum AC and DC output sink current maximum AC and DC output source current 1.8 1.9 1.5 2.0 2.1 2.3 - - 2.4 2.7 - - V mA mA mA - - 0.29 0.40 MHz/V MHz/V free-running see Figs 10 and 11 2(fIF + fs) 125 - 103 0 50 130 60 107 - 63 MHz mV dBc/Hz V k
DVB AGC detector tresp response to an increasing amplitude step in the IF input signal response to a decreasing amplitude step in the IF input signal I28 V15 Ri,15 Sadj V13 Ri,13 charging current discharging current AGC adjust input voltage range AGC adjust input resistance AGC adjust steepness external AGC voltage for DVB external AGC input resistance 2 V < V15 < 3 V see Fig.3 - 0.25 0.1 ms/dB
-
0.25
-
ms/dB
- - 1 8 - 1 40
200 200 2.5 10 -5 - -
- - 4.5 12 - 4.5 -
A A V k dB/V V k
1998 Jul 14
17
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
SYMBOL PARAMETER control steepness I23/f CONDITIONS MIN. TYP.
TDA9819
MAX.
UNIT A/kHz A/kHz
AFC circuit (DVB mode) SUS SEU DVB output signal (IF input to DVB output) V18(p-p) V18DC B C(DVB) H output voltage (peak-to-peak value) DC voltage -1 dB bandwidth -3 dB bandwidth fundamental input signal and IF harmonics suppression of in-band harmonics 2.0 V (p-p) output voltage CL < 15 pF; RL > 5 k CL < 15 pF; RL > 5 k; with internal AGC 1.8 - 11 - 35 30 2.1 2.5 12 17 40 35 2.4 - - - - - V V MHz MHz dB dB f0 = 48.75 MHz; see Fig.12 and note 17 f0 = 43.0 MHz; see Fig.12 and note 17 0.7 0.45 0.98 0.70 1.3 0.95
Notes to the characteristics 1. Values of video and sound parameters are decreased at VP = 4.5 V. 2. This parameter is not tested during production and is only given as application information for designing the television receiver. 3. Source impedance: 2.3 k in parallel to 12 pF (SAW filter); fIF = 45 MHz. 4. Loop filter 330 /220 nF; loop bandwidth for M standard: BL 70 kHz (natural frequency fn 12 kHz; damping factor d 2.9; loop bandwidth for B/G and L standard: BL 80 kHz (natural frequency fn 13 kHz; damping factor d 3.2; calculated with sync level within gain control range). Resonance circuit of VCO: Q0 > 50; Cext and Cint see Fig.12. 5. Temperature coefficient of external LC-circuit is equal to zero. 6. Vi IF = 10 mV RMS; f = 1 MHz (VCO frequency offset related to picture carrier frequency); white picture video modulation. 7. Vi IF signal for nominal video signal. 8. Offset current measured between pin 7 and half of supply voltage (VP = 2.5 V) under the following conditions: no input signal at VIF input (pins 1, 2, 4 and 5) and VIF amplifier gain at minimum (V28 = VP). Due to sample-and-hold mode of the FPLL in L standard, the leakage current of the loop filter capacitor (C = 220 nF) should not exceed 500 nA. 9. Measurements taken with SAW filter M3951M and M9352M (Siemens, M standard); frequency range = 10 kHz to 5 MHz. Sound carrier ON; PC/SC ratio 7 dB (transmitter); modulation VSB. 10. The 7 dB buffer gain accounts for 1 dB loss in the sound trap. Buffer output signal is typical 2 V (p-p), in event of CVBS video amplifier output typical 1 V (p-p). If no sound trap is applied a 330 resistor must be connected from output to input (from pin 21 to pin 22). 11. The leakage current of the AGC capacitor should not exceed 1 A at M and B/G standard respectively 10 nA current at L standard. Larger currents will increase the tilt. 12. S/N is the ratio of black-to-white amplitude to the black level noise voltage (RMS value, pin 10). B = 5 MHz weighted in accordance with "CCIR 567".
1998 Jul 14
18
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
TDA9819
13. The intermodulation figures are defined: V 0 at 3.58 MHz 0.92 = 20 log -------------------------------------- + 3.6dB ; 0.92 value at 0.92 MHz referenced to black/white signal; V 0 at 0.92 MHz V 0 at 3.58 MHz 2.76 = 20 log -------------------------------------- ; 2.76 value at 2.76 MHz referenced to colour carrier. V 0 at 2.76 MHz 14. Sound carrier ON; SIF SAW filter L9453; fvideo = 10 kHz to 10 MHz. 15. Response speed valid for a VIF input level range of 200 V up to 70 mV. 16. To match the AFC output signal to different tuning systems a current source output is provided. The test circuit is given in Fig.7. The AFC-steepness can be changed by the resistors at pin 23. 17. Depending on the ratio C/C0 of the LC resonant circuit of VCO (Q0 > 50; C0 = Cint + Cext; see Fig.12). 18. The intercarrier mode can be activated by connecting the SIF input pins 31 and 32 to GND (only for negative modulation B/G and M standard). In this event the intercarrier level depends on the sound shelf of VIF SAW filter and the transmitter PC/SC ratio. 19. Input level for second IF from an external generator with 50 source impedance. AC-coupled with 10 nF capacitor, fmod = 400 Hz, 25 kHz (50% FM deviation) of audio references. A VIF/SIF input signal is not permitted. Pins 8 and 28 have to be connected to positive supply voltage for minimum IF gain. S/N and THD measurements are taken at 75 s de-emphasis. The FM demodulator steepness Vo AF/fAF is negative. 20. Measured with an FM deviation of 25 kHz the typical AF output signal is 500 mV RMS (Rx = 0 ; see Fig.12). By using Rx = 470 the AF output signal is attenuated by 6 dB (250 mV RMS). For handling an FM deviation of more than 53 kHz the AF output signal has to be reduced by using Rx in order to avoid clipping (THD < 1.5%). For an FM deviation up to 100 kHz an attenuation of 6 dB is recommended with Rx = 470 . 21. The leakage current of the decoupling capacitor (2.2 F) should not exceed 1 A. 22. For all S/N measurements the used vision IF modulator has to meet the following specifications: Incidental phase modulation for black-to-white jump less than 0.5 degrees; QSS AF performance, measured with the television-demodulator AMF2 (audio output, weighted S/N ratio) better than 60 dB (deviation 25 kHz) for 6 kHz sine wave black-to-white video modulation. 23. The PC/SC ratio at pins 1 and 2 is calculated as the addition of TV transmitter PC/SC ratio and SAW filter PC/SC ratio. This PC/SC ratio is necessary to achieve the S/N(W) values as noted. A different PC/SC ratio will change these values. 24. Measurements for M standard with SAW filter M3951M (Siemens) for vision IF (suppressed sound carrier) and M9352M (Siemens) for sound IF (suppressed picture carrier). Input level Vi SIF = 10 mV RMS, 25 kHz FM deviation. Measurements for B/G standard with SAW filter G3962 (Siemens) for vision IF (suppressed sound carrier) and G9350 (Siemens) for sound IF (suppressed picture carrier). Input level Vi SIF = 10 mV RMS, 27 kHz (54% FM deviation). 25. Measurements taken with SAW filter L9453 (Siemens) for AM sound IF (suppressed picture carrier).
1998 Jul 14
19
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
Table 1 Input frequencies and carrier ratios SYMBOL B/G STANDARD M STANDARD fIF/fs fPC fSC1 fSC2 Picture-to-sound carrier ratio Table 2 Switch logic INPUT STANDARD SWITCH SWITCH 0 0 M, B/G and L 1 1 0 1 0 1 MODULATIO N MODE digital digital positive negative AGC external internal internal internal VCO CONTROL external external PLL PLL IF INPUT B B A A SC1 SC2 - 38.9 33.4 33.158 13 20 - 45.75 41.25 - 7 - L STANDARD - 38.9 32.4 - 10 - DVB (EU) 36.15/6.9 - - - - -
TDA9819
DESCRIPTION Symbol frequency Picture carrier Sound carrier
DVB (US) 43.75/5.0 - - - - -
UNIT MHz MHz MHz MHz dB dB
VIDEO OUTPUT AF M, B/G, L mute mute AM FM off off on on DVB on on off off
STANDARD DVB
1998 Jul 14
20
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
TDA9819
handbook, full pagewidth gain
70
MED682 - 1
0.06
(dB) 60 Ituner (mA) 0 40
VIF input (1/2 or 4/5) (mV RMS) 0.6
50
30
(1) (2) (3) (4)
6
20
1
10
60
0 2 -10 1 1.5 2 2.5 3 3.5 4 V28 (V) 4.5
(1) Ituner; RTOP = 22 k. (2) Gain.
(3) Ituner; RTOP = 11 k. (4) Ituner; RTOP = 0 .
Fig.3 Typical VIF and tuner AGC characteristic.
handbook, full pagewidth
110
MED683 - 1
100
(dBV) 100 90 80 70
SIF input (31,32) (mV RMS) 10
1
60 50
(1)
(2)
0.1
40 30
0.01
20 1 1.5 2 2.5 3 3.5 4 V8 (V) 4.5
(1) AM mode. (2) FM mode.
Fig.4 Typical SIF AGC characteristic.
1998 Jul 14
21
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
TDA9819
MED684
handbook, halfpage
70 60 50
S/N (dB)
handbook, halfpage
3.2 dB 10 dB 13.2 dB 27 dB
13.2 dB 27 dB
40 30 20 10 0 60 0.06 40 0.6 20 6 10 0 20 Vi IF(rms) (dB) 60 600 Vi IF(rms) (mV)
SC CC
PC
SC CC
PC
BLUE
YELLOW
MED685 - 1
SC = sound carrier, with respect to sync level. CC = chrominance carrier, with respect to sync level. PC = picture carrier, with respect to sync level. The sound carrier levels are taking into account a sound shelf attenuation of 20 dB (SAW filter G1962).
Fig.5
Typical signal-to-noise ratio as a function of IF input voltage.
Fig.6 Input signal conditions.
handbook, full pagewidth
VP
VP = 5 V
V23 (V) 4.5 3.5 2.5
I 23 (A) 200 100 0 100 200
MBH355
22 k
(source current)
TDA9819 23
I 23 22 k
1.5 0.5
(sink current)
38.5
38.9
39.3 f (MHz)
Fig.7 Measurement conditions and typical AFC characteristic.
1998 Jul 14
22
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
TDA9819
handbook, halfpage 2.5 V
white level
1.8 V 1.5 V
black level sync level
B/G standard standard B/G 2.5 V white level
1.95 V 1.8 V 1.65 V 1.5 V
threshold level black level threshold level sync level
Lstandard L standard
MED864
Fig.8 Typical video signal levels on output pin 21 (sound carrier off).
handbook, full pagewidth
VP = 5 V VP = 5 V 100 mV (fripple = 70 Hz)
TDA9819
MBH356
t
Fig.9 Ripple rejection condition.
1998 Jul 14
23
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
TDA9819
MBH357
handbook, full pagewidth
(1)
100
fVCO (MHz)
(2)
96
(3)
92
(4)
88 0 1 2 3 4 V16 (V) V7 (V) 5
L = 115 nH and C = 15 pF. (1) DVB. (2) f0 = 97.5 MHz. (3) M standard. (4) f0 = 91.5 MHz.
Fig.10 VCO control characteristic for DVB (USA) and M standard.
1998 Jul 14
24
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
TDA9819
MBH358
handbook, full pagewidth
90
fVCO (MHz) 86
(1)
(2)
82
(3)
78
(4)
74 0 1 2 3 4 V16 (V) V7 (V) 5
L = 248 nH and C = 5.6 pF. (1) DVB. (2) f0 = 86.0 MHz. (3) B/G and L standard. (4) f0 = 77.8 MHz.
Fig.11 VCO control characteristic for DVB (EUROPE), B/G and L standard.
1998 Jul 14
25
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idth
1998 Jul 14
10 nF SIF input 1:1 1 50 2 3 32 31 30 5 4 1 VIF input A 1 1:1 5 4 3 2 100 nF 3 CBL
TEST CIRCUIT
Philips Semiconductors
Multistandard vision and sound-IF PLL with DVB-IF processing
VP 22 k
AFC QSS output 100 nF VIF/DVB input switch L C7 330 25 24 23 22 21 20 19 18 17 22 k video output
(3)
tuner AGC 560
4.5/5.5 MHz
5.6 k DVBOUT 10 nF AF mute
2.2 F VIF AGC 29 28
GND
2.2 F Cref 26
27
TDA9819
4 5 TOP 22 k loop filter 6 7 8 2.2 F SIF AGC VP standard switch 10 F VP 9 10 11 12 13 14 15 16
330 220 nF
22 k
DVB AGCexternal
50
2
DVB AGCadjust Rx (1) VCOcontrol
26
DVB input B
CVBS
VCO adjust AFOUT 2.2 k
1:1 1 50 2 3 5 4
22 F CAF AFde-emphasis
(2)
75 CVBS
BC547 220
MBH353
CD
Product specification
TDA9819
(1) See note 20 in Chapter "Characteristics". (2) CD = 22 nF for 50 s de-emphasis; CD = 33 nF for 75 s de-emphasis. (3) See Table 3.
Fig.12 Test circuit.
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
Table 3 Test circuit values EUROPE 36.15/38.9 MHz 86.0/77.8 MHz
fpage
TDA9819
PARAMETER IF frequency VCO frequency Oscillator circuit
24
(1)
USA 43.75/45.75 MHz 97.5/91.5 MHz
alfpage
24
(1) (2) (3)
(2)
(3)
25
MBH359
25
MBH359
(1) C(VCO) = 8.2/11.3 pF. (2) C7 = 5.6 pF. (3) L = 248 nH.
(1) C(VCO) = 8.2/11.3 pF. (2) C7 = 15 pF. (3) L = 115 nH.
Toko coil Philips ceramic capacitor
5KM 369SNS - 2010Z 2222 632 39478
5KM 369SNS - 1647Z 2222 632 33129
1998 Jul 14
27
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
INTERNAL PIN CONFIGURATIONS
TDA9819
+
+
+
1 1.1 k 5 k 2.5 A 25 A 3 2.65 V
+
1.1 k 2 3.6 V
+
MGD640
MGD641
Fig.13 Pin 1; Vi VIF1 and pin 2; Vi VIF2.
Fig.14 Pin 3; CBL.
+
4 1.1 k 5 k
30 k
20 k
+
1.1 k 5 2.65 V 3.6 V 6
+
9 k 3.6 V 1.9 V
MGD642
MGD643
Fig.15 Pin 4; Vi VIF3 and pin 5; Vi VIF4.
Fig.16 Pin 6; TADJ.
1998 Jul 14
28
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
TDA9819
+
+
50 k
VCO
7
5 A 53 A 39 A
+ +
+
+
8
MGD644
MGD645
Fig.17 Pin 7; TPLL.
Fig.18 Pin 8; CSAGC.
+
26 k
+
6.4 k 0.5 pF
+
10 9 3.6 V 0.2 pF 2.5 mA
MGD646 MGD647
5.1 k
Fig.19 Pin 9; STD.
Fig.20 Pin 10; Vo CVBS.
1998 Jul 14
29
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
TDA9819
+ +
9 k
+
2.3 mA
17 k
+
14.7 k 12 11 25 pF 3.6 V
120
MGD648 MGD649
Fig.21 Pin 11; VCOADJ.
Fig.22 Pin 12; Vo AF.
+ +
50 k 13 14
+
MGD650 MGD651
Fig.23 Pin 13; VAGC(ext).
Fig.24 Pin 14; CAF.
+
12 k 1.6 k 15 50 k 10.1 k 3.6 V 17.2 k 2.7 V
MGD652 MGD653
+ +
50 k
16 12.5 k VCO
5 A
Fig.25 Pin 15; AGCADJ.
Fig.26 Pin 16; VVCO(ext).
1998 Jul 14
30
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
TDA9819
10 k
+ +
640 17
MGD654
+
10 A 5.1 k
3.6 V 3.9 k 18
40 k
40 k 2.7 mA
5.1 k
MGD655
10 pF
Fig.27 Pin 17; Vi FM.
Fig.28 Pin 18; DVB.
+
+
19 20 2.5 mA
MGD656
10 k
1.6 k 1.9 mA
MGD657
Fig.29 Pin 19; TAGC.
Fig.30 Pin 20; Vo QSS.
+
10 k 2.1 pF 21 0.7 pF
+
3.3 k 2 k
2.2 k
2.0 mA 3.3 k 50 k 3.6 V 20 k 10 pF
MGD658
22
MGD659
Fig.31 Pin 21; Vo(vid).
Fig.32 Pin 22; Vi(vid).
1998 Jul 14
31
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
TDA9819
+
420 24 200 A 23 2 x 10 k
+
+
MGD661
1 k
1 k
25
420 2.8 V
MGD660
Fig.33 Pin 23; AFC.
Fig.34 Pin 24; VCO1 and pin 25; VCO2.
+
20 k 70 k
+
+
+
20 k 650
GND 27
26
MGD663
MGD662
Fig.35 Pin 26; Cref.
Fig.36 Pin 27; GND.
1998 Jul 14
32
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
TDA9819
+
+
50 k
28
29
+
++
+
MGD665
1 mA
MGD664
Fig.37 Pin 28; CVAGC.
Fig.38 Pin 29; VP.
+ +
31 30 13 k 3.6 V 1.1 k 5 k 3.6 V
+
MGD666
1.1 k 32 2.65 V
MGD667
Fig.39 Pin 30; INSWI.
Fig.40 Pin 31; Vi SIF1 and pin 32; Vi SIF2.
1998 Jul 14
33
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
PACKAGE OUTLINES SDIP32: plastic shrink dual in-line package; 32 leads (400 mil)
TDA9819
SOT232-1
D seating plane
ME
A2 A
L
A1 c Z e b 32 17 b1 wM (e 1) MH
pin 1 index E
1
16
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 4.7 A1 min. 0.51 A2 max. 3.8 b 1.3 0.8 b1 0.53 0.40 c 0.32 0.23 D (1) 29.4 28.5 E (1) 9.1 8.7 e 1.778 e1 10.16 L 3.2 2.8 ME 10.7 10.2 MH 12.2 10.5 w 0.18 Z (1) max. 1.6
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT232-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-02-04
1998 Jul 14
34
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
TDA9819
SO32: plastic small outline package; 32 leads; body width 7.5 mm
SOT287-1
D
E
A X
c y HE vM A
Z 32 17
Q A2 A1 pin 1 index Lp 1 e bp 16 wM L detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.3 0.1 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 0.02 0.01 c 0.27 0.18 0.011 0.007 D (1) 20.7 20.3 0.81 0.80 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 0.419 0.394 L 1.4 0.055 Lp 1.1 0.4 0.043 0.016 Q 1.2 1.0 0.047 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 0.95 0.55 0.037 0.022
0.012 0.096 0.004 0.086
8o 0o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT287-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-01-25 97-05-22
1998 Jul 14
35
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (order code 9398 652 90011). SDIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
TDA9819
Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. WAVE SOLDERING Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1998 Jul 14
36
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA9819
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1998 Jul 14
37
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
NOTES
TDA9819
1998 Jul 14
38
Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with DVB-IF processing
NOTES
TDA9819
1998 Jul 14
39
Philips Semiconductors - a worldwide company
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For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1998
SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545104/00/02/pp40
Date of release: 1998 Jul 14
Document order number:
9397 750 03813

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